Exciting news! This column marks the launch of a series of columns diving into semi-additive PCB (SAP) manufacturing processes. We will explore topics ranging from SWaP (space, weight, and packaging) benefits, signal integrity benefits, materials characterization, reliability testing, and even the search to find a calculator that is compatible with straight conductor sidewalls and line width and space at 1.0 mil and below.
Although more people are becoming familiar with the term SAP, specifically as it relates to PCB manufacturing, this technology is new to most people. It seems that mSAP (modified semi-additive processes) make headlines for enabling volume consumer applications such as our smartphones, to be produced with roughly 35-micron feature sizes. Yet we have not heard a lot about semi-additive PCB processes for applications outside of this specific market.
The really exciting news is that there are now a handful of U.S.-based fabricators offering this technology for low volume/high mix applications. This opens so many new opportunities previously unavailable for PCB designers and at the same time generates a myriad of questions from the design community as well as the fabrication community. Before we dive in and start addressing these questions, let’s step back and discuss the semi-additive PCB process flow and how that is being integrated into existing subtractive etch PCB processing lines.
Semi-Additive PCB Process
This process flow from Averatek gives a simplistic view of the semi-additive PCB process flow. I do not want to assume that all are familiar with the subtractive etch process and want to point out that with steps two and three, these are the same process steps used to manufacture with traditional processes. Rather than etching away the copper that is not required for the circuitry, with this process, all copper is etched from the manufacturing panel. From there, a palladium deposition using LMI™ technology is coated on the panel. The next step is electroless copper, typically the same electroless chemistry
being used by the fabricator for the subtractive process.
This step is critical to understanding the benefits of the semi-additive process. The thin LMI coating enables a very thin, conformal layer of electroless copper, 4–20 µin, which is much thinner than typical electroless copper plating. More to come on the significance of this.
Following electroless copper, panels move to dry film resist imaging, followed by electrolytic copper and dry film resist strip, all standard manufacturing processes. The final step in the circuit creation process is to flash-etch the electroless copper layer. Circling back to the thickness (or actually, thinness) of that electroless copper layer, it is important to point out that the flash-etch of the very thin electroless copper layer has very little impact on the trace itself. Etching of thicker copper results in the trapezoidal effect that we are all aware of. With semi-additive processing, the trace sidewalls remain straight, and the line
width tolerance is tighter. In future columns we will discuss the impact of this on impedance control.
Following these wet process steps, the semi-additive manufacturing panels will follow the same process flow that subtractive etch panels follow including solder mask, surface finish plating, electrical test, and
inspection.
Why Is This Important to PCB Design?
Traditional subtractive etch processing, at least in the U.S., becomes very difficult for feature sizes below 3 mils (75 microns). As electronics packages shrink, this forces PCB designs to become much more complex— adding extra routing layers, adding microvia layers, and increasing lamination cycles
required, all which impact yield, reliability, and cost.
The semi-additive process jumps this technology curve. Within a few weeks, fabricators previously able to offer 3-mil line/space, can now offer 1-mil line/space and below. That is a complete game changer for PCB design. Some of the benefits are easily seen:
• The ability to shrink the overall size of a circuit
• The ability to route additional traces between pads can reduce the overall number of layers required for a design and subsequently the ability to reduce the number of stacked or staggered microvias
Over the next few months, we will review use cases to help spur ideas.
There are also significant signal integrity benefits from semi-additive processing. There is tighter line width control and straight conductor sidewalls greatly improve impedance control. Another feature to additive processing creating a buzz within the design community is the ability to create higher aspect ratio traces than available with subtractive etch or even mSAP options.
We are just scratching the surface on how to best apply these new capabilities to PCB design, and I am looking forward to collaborative discussion and creativity. It is tempting to ask for “design rules” but in my opinion, that may limit the creativity in approaching design challenges in a new way and my hope is that we can develop a community of interest followed by a community of design expertise around this new technology. Please reach out to me with your questions and stay tuned as we start a deeper dive into this exciting technology.